The present invention relates to a semiconductor device and method of manufacture in which the terminal voltages of the structures formed in passively isolated islands therein may be increased by the reduction in corner breakdown.
Corner breakdown is a known mechanism in dielectrically isolated ("DI") island structures and is described, for example, in Weston et al "Monolithic High Voltage Gated Diode Array IC", IDEM 82, pp. 86-87, as being due to the electric field resulting from the potential difference between an island interconnect and the substrate immediately adjacent the lateral edge of the island when the substrate is biased to fully deplete the corner region by a remote reverse biased PN junction. As described, this problem may be attacked by increasing the uniform thickness of the dielectric to about 5 microns (a) between the island and the biased substrate and (b) overlying the island surface. The high field which passes through the extreme (i.e., within a few microns) lateral edge or corner of the semiconductor island at the point where the interconnect crosses the island edge may cause the generation of hole-electron pairs by avalanche. The collection of such pairs by a remote reverse biased PN junction in the island will thus limit the voltage which can be applied to the PN junction before conduction occurs.
However, the corner breakdown problem occurs not only where the conductor crosses the lateral edge of the island, but where the conductor approaches the island edge. In addition, the 5 micron thickness of the dielectric is generally unacceptable elsewhere in the island, either overlying the island surface or between the island and the substrate. Not only is it rare that the remote bias of a remote PN junction totally depletes the corner region of the island, but the high bias of the substrate required for such depletion exacerbates the corner breakdown problem. Finally, the geometry of the IC may be such that the offending field is between the interconnect and conducting material other than the substrate.
One way to reduce corner breakdown and thus increase maximum terminal voltage, and at the same time to avoid the problems associated with an uniformly thick dielectric, is to increase the thickness of the dielectric only between the conductor and the surface of the island. However, and as earlier explained, an increase in the thickness of the oxide applied to the surface of the island is undesirable for other reasons such as increased stress and increased thermal resistance. Further, such initial thickness undesirably increases the ultimate thickness of the IC where second or higher level island interconnects are used and additional thicknesses of insulation must be applied for each conducting layer. Finally, an increase in the thickness of the insulation overlying the surface of the island increases the difficulty in making the necessary connections between the conductors and the surface, particularly where small contacts are desired e.g., the size and profile of the etch of the insulator and step coverage or thinning of the conductor metal.
It is accordingly an object of the present invention to provide a novel integrated circuit and method of increasing the maximum terminal voltage of a semiconductor device which avoids the problems of uniformly thicker insulation in DI and which is broader in its application to other types of island isolation.
In one aspect, only the thickness of the insulator layer between the conductor and the surface of the island is increased thereby avoiding the problems of thick insulation between the island and the substrate. Further, the thickness may be increased by the use of additional thin insulating layers without the disadvantages associated with a single thick insulating layer.
Another way to reduce corner breakdown and thus increase maximum terminal voltage is to increase only the thickness of the dielectric between the side of the island and the adjacent conducting region to thereby avoid the problems associated with a thick surface layer. As indicated above, and where as is common in DI and SOI isolated islands, the oxide which provides vertical isolation of the island from the underlying substrate and which provides lateral isolation is deposited in the same step and has the same thickness, an increase in the thickness of the oxide is undesirable because of increased stress and defects and increased thermal resistance; in some instances, necessitating a significant increase in the size of the circuit.
It is accordingly another object of the present invention to provide a novel integrated circuit and method of increasing the maximum terminal voltage of a semiconductor device by increasing the effective thickness of the insulator layer between the conductor and the adjacent conducting region without the disadvantages associated with a uniformly thick insulator for the island. Further, the thickness of the lateral insulation may be varied around the perimeter of the island to accommodate the location of interconnects and other circuit elements.
It is yet another object of the present invention to provide a novel integrated circuit and method of increasing the maximum terminal voltage of a semiconductor device without the uniform bias requirements of the prior art. In one aspect, the invention effects electrical separation of the vertical and lateral substrates, thus permitting separate biasing.
These and many other objects and advantages will be readily apparent to one skilled in the art to which the invention pertains from the claims and from a perusal of the following detailed description of preferred embodiments when read in conjunction with the appended drawings.